Test-oriented card with up to 6 independent sRIO® ports of 1/2/4 lanes at 1.25/2.5/3.125/5G per lane. LabVIEW integrated with an included support library of VIs.
The sRIO® Test Instrument integrates up to six independent sRIO® interfaces into the LabVIEW environment using the PXIe-7902 card. The FPGA core is designed and optimized for test/verification applications and is available with LabVIEW support or Windows C API and can be integrated into LabVIEW TestStand.
The Test Instrument can be operated in two modes: In interface mode, the user can control the sRIO® interfaces in real time via software. Test mode is conducted via scripted operations where the user specifies all facets of the transaction including header info, payload, packet type, and cadence/timing of operations before handing off execution to the hardware. During both modes, all incoming and outgoing packets are time stamped, recorded and logged for user review.